Regviz

Espressif Systems /ESP32-P4 /ISP /DPC_CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DPC_CTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-P4/ISP/DPC_CTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DPC_CHECK_EN)DPC_CHECK_EN 0 (STA_EN)STA_EN 0 (DYN_EN)DYN_EN 0 (DPC_BLACK_EN)DPC_BLACK_EN 0 (DPC_METHOD_SEL)DPC_METHOD_SEL 0 (DPC_CHECK_OD_EN)DPC_CHECK_OD_EN

Description

DPC mode control register

Fields

DPC_CHECK_EN

this bit configures the check mode enable. 0: disable, 1: enable
STA_EN

this bit configures the sta dpc enable. 0: disable, 1: enable
DYN_EN

this bit configures the dyn dpc enable. 0: disable, 1: enable
DPC_BLACK_EN

this bit configures input image type select when in check mode, 0: white img, 1: black img
DPC_METHOD_SEL

this bit configures dyn dpc method select. 0: simple method, 1: hard method
DPC_CHECK_OD_EN

this bit configures output pixel data when in check mode or not. 0: no data output, 1: data output

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/espressif/svd